IP-Core Design for FPGA and ASIC
Fraunhofer IPMS is a provider of high quality and silicon-proven IP core solutions for ASIC, FPGA and SoC designs. For more than twenty years, more than 200 licensees worldwide have trusted the quality of our IP core solutions for FPGAs, SoCs and ASICs, complemented by our comprehensive support and service. The IP core portfolio includes interface, security and RISC V processor IP. To accelerate IP integration, we offer implementation, customization, maintenance and support services in addition to licensing. Our extensive investment in IP quality, comprehensive technical support, and robust IP development methodology enables developers to reduce integration risk and accelerate time-to-market.
We also develop IP cores focused on functional safety that make it easier for manufacturers to achieve the appropriate ASILs for their products under the ISO 26262 standard for automotive safety-related electrical and electronic systems. Most of our IP cores are already ASIL-D-ready certified.