Nanopatterning / E-Beam Lithography

Example of different LS and CH nanostructures after lihtography and after etching steps.
Nanostructure as designed (left) and after e-beam nanopatterning and etching (right). Smallest pitch 80 nm, trench width 28 nm (in cooperation with Infineon Dresden, RWTH Aachen, and FZ Jülich).
Example of the Mix & Match Variations. As designed (left), SEM images after exposure of the second lithography layer (middle), and after etching step (right). The work is done in the frames of SAB Project FOKUS (Advanced Concepts for Patterning and Metallization in MOL and BEOL) in the joint project FD-REX (MOL and BEOL Process Development for Roadmap Extension of FD-SOI Technology- Fully Depleted SOI Roadmap Extension).

Creating nano-scale structures is necessary for a wide range of applications in the semiconductor business. Key challenges are creating precisely controlled patterns with small dimensions, flexible and adaptable layout generation and processes as well as uniform and reproducible wafer-scale integration.

Fraunhofer IPMS offers state-of-the-art nanopatterning capabilities using electron beam direct write lithography and reactive ion etching. Thus, customized structures with sizes below 40 nm can be created on a variety of wafer sizes and substrate types. Starting from the customer’s design the whole package involving layout generation and modification, data preparation, e-beam lithography, pattern transfer using etch processes together with the needed in-line metrology and analytics up to separation into single chips is offered.


Application examples

  • Fabrication of test structures for technology development
  • Structuring of Application Specific Integrated Circuits (ASICS)
  • Design tests of innovative devices and cell concepts and their variation on a wafer (Chip Shuttle)
  • Calibration pattern for metrology development
  • MEMS and NEMS patterning with productive quality
  • “Mix & Match” with optical exposure techniques