Energy-saving chips for digital, analog and RF

FAMES pilot line - Innovation in advanced semiconductor technologies for a sovereign European chip industry.

Sub-project of the EU Chips Act initiative

© CEA-Leti
FAMES Consortium
© Fraunhofer IPMS
300 mm CMOS clean room at the Fraunhofer IPMS - Center Nanoelectronic Technologies in Dresden.

Towards low-power chips for digital, analog and high-frequency technologies: CEA-Leti and Fraunhofer extend their collaboration in the FAMES pilot line, a pioneering project to promote semiconductor technologies in Europe. This initiative supports the EU Chip Act, which aims to strengthen the EU's technological sovereignty.

 

The pilot line will develop five new sets of technologies:

  • FD-SOI (with two new generation nodes at 10nm and 7nm),
  • Several types of embedded non-volatile memories (OxRAM, FeRAM, MRAM and FeFETs),
  • Radio-frequency components (switches, filters and capacitors),
  • Two 3D integration options (heterogeneous integration and sequential integration), and
  • Small inductors to develop DC-DC converters for Power Management Integrated Circuits (PMIC).

Fraunhofer IPMS in the project

With the combined expertise of Fraunhofer IPMS and IZM-ASSID, we offer a unique environment for the development, integration, and characterization of novel storage materials and stacks on 300 mm wafers. Our goal: to significantly accelerate the path from material idea to functional storage solution. We focus on ferroelectric memory and compute-in-memory (CiM) accelerators.

 

Below is an overview of our main areas of research. 

Integration of hafnium dioxide (HfO2) ferroelectric material

Integration of hafnium dioxide (HfO₂) ferroelectrics 

  • Goal 1: Material testing platform with standardized test structures and customized characterization environment
  • Goal 2: Wafer loop and integration services for novel memory materials and stacks

Our activities include:

  • Integration of HfO₂-based ferroelectric stacks in CMOS at CEA-Leti
  • Array evaluation of FeRAM and FeMFET
  • Electrical characterization of test structures
  • Benchmarking of material stacks
  • CEA-Leti will perform nanosecond laser annealing on Fraunhofer material

Benchmarking and integration of nitride-containing ferroelectrics

Benchmarking and integration of nitride-containing ferroelectrics

Goal 3: Evaluation of post-CMOS materials in CEA-LETI memory test structures

The main challenges addressed by FAMES:

  • Scalable “CMOS-friendly” integration concept for nitrides
  • Retention of material properties and reduction of leakage effects

Fraunhofer ISIT is also involved in this work package. CEA-Leti and Fraunhofer are working closely together. CEA-Leti designs and manufactures memory wafers. Fraunhofer will integrate novel ferroelectric materials into these wafers. The final process can take place at either research organization. The final characterization will be carried out jointly.

Environmental assessment of highly integrated electronics

Close-up of the electronics in a camera.

Environmental assessment of highly integrated electronics

Goal 4: Generation of environmental data for ferroelectric storage technologies

 Through carbon footprint analyses, life cycle assessments (LCA), and other impact studies, we create transparency and support the development of sustainable technologies.

Our approach:

  • Technology and product-specific analyses from semiconductors to packages to end products
  • Environmentally friendly concepts: low energy consumption, lead-free solutions, extended life cycles, active monitoring and benchmarking at the package and system level

Compute-in-Memory (CiM) accelerators

Compute-in-Memory (CiM) accelerators

Goal 5: Joint accelerator as a test platform for various ferroelectric material concepts

This enables us to create a powerful platform for quickly and efficiently evaluating different ferroelectric material concepts. To this end, IPMS develops innovative architectures and integrates them into novel accelerator and array structures.

Our focus areas:

  • Design & Architecture: Development of FeMFET arrays and neuromorphic accelerators
  • Tapeout 1 (Leti): Basic test structures, bit cells, and mini-arrays
  • Tapeout 2 (Leti): Advanced accelerators and arrays for FeMFET and other concepts

The FAMES consortium – partners from across Europe:

  • CEA-Leti (France)
  • imec (Belgium)
  • Fraunhofer (Germany)
  • Tyndall (Ireland)
  • VTT (Finland)
  • CEZAMAT WUT (Poland)
  • UCLouvain (Belgium)
  • Silicon Austria Labs (Austria)
  • SiNANO Institute (France)
  • Grenoble INP-UGA (France)
  • University of Granada (Spain)

Funding note

This project has received funding (2023 – 2028) from Horizon Europe and Partners‘ National Public Authorities under GA N°101182297