Deposition

Process Development and Optimization

We provide process development and film optimization tailored to your technology requirements. Our experts adjust deposition parameters, film thickness, and material properties to achieve the desired electrical, optical, or mechanical characteristics.

Optimization targets:

• Electrical conductivity
• Optical properties (reflection, transmission)
• Mechanical stress
• Adhesion and interface quality
• Layer uniformity across 200 mm wafers

Custom materials, layer stacks, or film thicknesses can be implemented on request.

Layer Characterization in the Cleanroom

We perform comprehensive characterization of deposited layers in a cleanroom environment:

• Defect density analysis
• Optical characterization (film thickness and reflection)
• Film resistance measurement
• Film stress evaluation
• Film thickness via profilometer after step etching
• Morphology assessment (SEM, XRD/XRR)
• Surface roughness measurement (AFM)
• More about our characterization capabilies here

• ALD deposited High-k oxides and electrodes for: stand-alone memory and embedded memory (SRAM, DRAM, RRAM and FRAM)
• HfO₂, TiN and TaN for High-k / Metal Gate (HKMG) for different flavors: high-k first, high-k last, FDSOI and FinFET transistor technologies
• Fully CMOS-compatible ALD deposited HfO₂ based ferroelectrics for FeFET NVM memory
• Passive components integrating ALD deposited 3D high-k MIM capacitors (for buffering and decoupling purposes in chip (System on Chip - SoC) or package (System in Package - SiP) level)
• PEALD oxide and nitrides for the transistor module and for sub 28 nm double patterning schemes such as SADP
• Hardmask for high aspect etching in silicon and oxide
• Passivation layers for photovoltaics 
• ALD processes for MEMS/MOEMS applications: etch stops, wear resistant layers, optical layers (Bragg mirror) and sensor materials (ISFET)

Rapid ALD precursor screening

• Fast screening by employing in-situ analytics (QCM and QMS)
• Fundamental research on nucleation fi lm growth and step coverage
• Scale up to from small samples up to 300 mm wafers
• Single wafer and Large Batch ALD
• Crossflow, Showerhead and Batch Furnace process chambers

Materials research and development for:

• High-k oxides (HfO₂, ZrO₂, TiO₂, Al₂O₃ ,SiO₂)
• Metals and metal nitrides
• Cu BEoL barrier/seed
• Hardmasks for high aspect ratio etching in silicon and oxide
• Liners and spacer
• Low cycle-time test chip for electrical read out for MIS / MIM devices 
• Planar and 3D high-aspect ratio structures

Applications:

• Dielectrics/ passivations: SiO₂, Al2O₃
• High-k materials: HfO₂, ZrO₂
• Ferroelectric materials: HfO₂ doped with Al, Zr, Si, La

Substrate:

• 300 mm silicon wafers,
• Single wafer process

Tools:

• ASM Pulsar, Jusung Eureka 3000

Applications:

• Dielectrics/passivations: SiO₂, Al2O₃, TiO₂
• High-k materials: HfO₂
• Li-based materials: LiPON, LTO

Substrate:

• 300 mm silicon wafers
• Single wafer process

Tools:

• ASM EmerALD, Oxford FlexAl

Applications:

• Electrode material: TiN

Substrate:

• 300 mm silicon wafers, Batch process (up to 35 wafers per run)

Tools:

• ASM A412

Chemical Vapor Deposition (CVD) is a thin-film deposition technique used to form solid films from gaseous reactants. Precursor gases are introduced into a reactor, where they adsorb onto the substrate surface and chemically react into a solid film. Gas-phase reactions are activated either by thermal energy (thermal CVD) or by plasma ionization (plasma-enhanced CVD). Depending on the process conditions, CVD can produce amorphous, polycrystalline up to high-quality epitaxial films. The technique ensures high throughput, with rapid deposition rates and excellent uniformity across large-area substrates.

What we offer:

• Custom processing for broad range of CVD applications
• High-throughput deposition with precise control over films properties
• Innovation support for deposition on 300 mm R&D
• Scalable for mass production / fab-ready technology

In case of plasma-enhanced CVD:

• Low-temperature processing for BEOL and temperature-sensitive substrates
• Plasma-engineered film properties (tunable density, stress, composition)

Materials:

• Dielectrics: SiO₂, SiN, SiON
• Low-k materials: SiCOH (BD-1), ULK (BD-2) 
• Passivation and Barrier low-k materials: SiC, SiCN, a-Si, a-C

Applications:

• Interlayer dielectrics for CMOS devices
• Diffusion and moisture barriers in IC fabrication
• Hard mask and etch stop layers for lithography
• Stress engineering layers
• Interconnect dielectrics for advanced BEOL integration
• RC delay and power consumption reduction in high-speed logic
• Porous ultra-low-k dielectrics for technology scaling in modern ICs
• Active and structural material for TFTs, MEMS and sensors

Materials:

• TiN (pulsed CVD / ALD-like)
• Bor/phosphor doped Si
• Polycrystalline Si and Ge
• Bor/phosphor doped SiGe

Applications:

• Conformal metal gate electrodes – excellent step coverage
• In-situ doped low-resistance films
• Strain-engineered transistor channels and gates
• Bandgap-tunable semiconductor electrodes
• Advanced logic node integration

Materials:

• Metals: Co

Applications:

• Seed / liner layers for Cu or Co interconnects - excellent step coverage
• Direct Co interconnects

Epitaxy is a flexible crystal growth technique in which the crystal structure and orientation of the substrate are continued during layer formation, resulting in high-quality single-crystalline films. In leading-edge semiconductor manufacturing, epitaxy is essential for bandgap engineering through defect-free heteroepitaxial stacks of different materials, as well as for strain engineering, where lattice mismatch between substrate and grown layer is used to enhance carrier mobility in transistor channels. In addition, in-situ doped epitaxial source and drain layers enable the formation of highly abrupt p–n junctions, which are critical for advanced device performance.

Fraunhofer IPMS is equipped with a unique 300 mm batch reactor for selective epitaxy. Silicon and silicon-germanium layers can be provided from nanometer to micrometer thickness scales. Selective epitaxy and in situ doping technologies enable innovative device integration schemes. Additionally, batch processing yields significantly reduced cost of ownership as well as low thermal budget without compromising wafer throughput. In combination with state-of-the-art equipment for wafer patterning, cleaning and characterization, Fraunhofer IPMS offers a flexible platform for the development of single processes, process modules and integrated devices.

What we offer:

• Atomically ordered layer growth
• Strain and band gap tunable by composition adjustment
• Batch processing for reduced cost of ownership
• Selective epitaxy for development of innovative devices
• Flexible platform for joint technology development
• Full lab support for epitaxial layer characterization

Applications:

• Embedded SiGe for strain generation in transistor channels
• In situ doped low resistivity source/drain contacts
• Single crystalline, band engineered heterostructures and super lattices
• Formation of active regions in e.g. SiGe HBT or BiCMOS devices

Physical Vapor Deposition (PVD) is a precise technique for depositing thin films by transferring material under high vacuum from a source to a substrate. This process enables uniform, high-quality films essential for semiconductor, MEMS, and sensor devices.

We offer advanced PVD deposition of metals, metal oxides, and metal nitrides on 200 mm and 300 mm wafers, supporting research, prototyping, and pilot-scale production.

Using modern sputtering and electron beam evaporation systems, we provide exact control over film thickness, composition, and material properties, ensuring consistent performance for demanding electronic, optical, and sensor applications.

Depositable Materials

Thin Film Deposition Capabilities

Our infrastructure includes three sputter cluster systems for DC and RF sputtering, providing flexible physical vapor deposition (PVD) of a wide range of materials.

Key capabilities:

• PVD deposition of metals, metal oxides, and metal nitrides
• 200 mm wafer processing
• Advanced sputter cluster tools with:
  • DC sputtering
  • RF sputtering
  • Optional wafer bias pretreatment
  • Integrated wafer degassing
• Electron beam evaporation for specialized materials
• Deposition of single layers and multilayer stacks, in-situ or across multiple systems depending on materials

Our team can customize multilayer structures based on your requirements, ensuring optimal adhesion, uniformity, and film performance.

Applications

Our thin film deposition processes support a wide range of semiconductor, MEMS, and sensor technologies.

Typical applications:

• Metallization layers for semiconductor devices
• Barrier and diffusion layers
• MEMS actuator structures
• Optical coatings, including anti-reflection layers
• Mirror layers for optical and micro-optical devices
• Functional thin films for chemical and biological sensors

Technology platforms include:

• SLM mirror systems
• ISFET sensors
• CMUT devices

Available materials and alloys:

• FEOL: Si, Co, Hf (N, Ox), Zr (N, Ox), Ti (N, Ox), cosputtering of 2 materials is possible, deposition on hot wafer (up to 400°C)
• MRAM: CoFeB, CoFe, W, Mo, MgO, Ta, Co, Pt, Ru, Ni
• Other processes available in the tool: degas in Ar atmosphere (RT - 440°C), surface preclean (etching) with Ar plasma, annealing in vacuum (up to 450°C)
• Ta(N), Cu, Ti
• Other processes available in the tool: Mo-CVD Co, ALD, TaN, degas/Annealing in Ar/H2c atmosphere (up to 440°C)

Metrology:

• OBM
• XPS