Dry Etch

Semiconductor Process Services

Deep Silicon Etching (DRIE) - High aspect ratio structures with maximum precision

200 mm

© Fraunhofer IPMS

With our DRIE (Deep Reactive Ion Etching) process, we create extremely deep, anisotropic silicon structures with the highest aspect ratios – ideal for MEMS, sensor technology, actuator technology, TSVs and complex microsystems.

The proven Bosch process allows us to combine high etch rates, steep sidewalls and excellent selectivity – even with very small structure widths or large etch depths.

Technology and principle

Our DRIE is based on a cyclic plasma etching process with alternating steps:

  • Silicon etching
  • Sidewall passivation with polymer
  • Directional ion removal at the bottom

This interaction enables:

  • Nearly vertical profiles
  • High aspect ratios up to > 30:1
  • Depths of several hundred micrometres
  • Reproducible results even with complex layouts

Process competence & performance data

High performance:

  • High etch rates for economical throughput times
  • Very good selectivity for resist or hard masks (SiO₂, Al₂O₃, etc.)
  • Stable profiles across different open areas

Precise geometries

  • Deep trenches and cavities
  • Narrow structures with high aspect ratios (~30:1)
  • Controlled sidewall quality
  • Minimised underetching

Flexible process control:

  • Resist or hard masks
  • Small to large structure areas
  • Low and high open area designs
  • Multi-stage or stopped etching processes (e.g. on BOX or metal)

Applications

  • Insulation trenches
  • Structure releases and MEMS mechanics
  • TSVs (through silicon vias)
  • Apertures and breakthroughs
  • Deep cavities and pits
  • Pockets at depths of up to 300 µm
  • Filter and grid structures
  • Thick wafer etchings up to 400–650 µm
  • Full-surface layer removal

 

Our advantages at a glance

  • Extremely deep silicon etchings with high precision 
  • High aspect ratios (~30:1) and vertical side walls
  • Clean, dry processes without wet chemistry
  • Very good mask selectivity
  • High reproducibility and series production capability
  • Flexible process development for customer-specific designs
  • Suitable for MEMS, sensor technology, actuator technology, packaging and 3D integration

Plasma Ashing and Photoresist Removal – Clean surfaces for reliable processes

200 mm

© Fraunhofer IPMS
Fig.: left: pure N2 plasma, right: O2+CF4 plasma

With our plasma ashing processes, we remove photoresists, polymers and organic residues quickly, without leaving any residue and with minimal damage to the material. The technology is suitable for both single-wafer and batch processes and provides optimal preparation for subsequent steps such as metallisation, etching or bonding. The result: clean, activated surfaces and maximum process reliability.

 

Technology & principle

Our processes are based on microwave-excited oxygen plasma:

  • Chemical decomposition of organic materials
  • High ablation rates with minimal damage to components
  • Self-limiting stop on inorganic layers
  • Uniform removal even on complex topographies

Temperature-controlled process control with IR monitoring ensures high ablation performance without thermal stress on sensitive structures. Depending on the application, special gases (e.g. CF₄ or N₂) are also used to specifically adjust ablation, selectivity or temperature.

© Fraunhofer IPMS
Fig.: left before and right after the descumming process

Our process modules

Photoresist removal (resist strip):

  • Complete resist removal with O₂ plasma
  • High homogeneity
  • Ideal after lithography, implantation or etching processes
  • Batch operation for cost-efficient series production
  • Double-sided cleaning possible

Descumming / Flash Strip:

  • Removal of extremely thin residual layers (scum)
  • Clean paint edges
  • Residue-free substrate surface
  • Optimal preparation for electroplating, lift-off and metal deposition
© Fraunhofer IPMS
Fig.: Etched trenches with (left) and without (right) sidewall polymer from the Bosch process

Surface activation:

  • Conversion from hydrophobic to hydrophilic
  • Significantly reduced contact angles
  • Improved wetting and adhesion
  • Ideal prior to wet etching, coating, bonding processes or gluing

Polymer removal according to the Bosch process:

  • Reliable removal of sidewall polymers after deep silicon etching
  • Suitable for high aspect ratio structures and deep trenches
  • Clean surfaces for subsequent process steps

 

Our advantages at a glance

  • Fast and residue-free paint and polymer removal
  • Material-friendly processes with controlled temperature
  • High uniformity and reproducibility
  • Batch or single-wafer operation possible
  • Improved adhesion and surface quality
  • Perfect preparation for metallisation, etching and packaging
  • Economical series production

Metal Etching – Precision at the highest level

200 mm

© Fraunhofer IPMS
Examples of structured metal layers with different open-area ratios: top: thick TiAl layer; middle: TiAl layer with very high open area (98%); bottom: AlSiCu layer with high open area (95%).

Our RIE05 cluster system is a specialised production facility for dry etching metals and metal oxides.

We offer high-precision, reproducible plasma etching for demanding metallic layer systems and dielectric stacks on metal. Our focus: precise profiles, high process stability and maximum component reliability – for both I-line lithography and DUV lithography.

 

Technology & equipment

  • Cluster tool with 2 ICP/TCP® etch chambers and integrated ashing
  • Inductively coupled high-density plasma/low process pressure enable the structuring of small structures
  • Separate bias control for precise ion acceleration and profile control
  • Bipolar ESC with helium cooling for stable temperature control
  • In-situ ashing and passivation for maximum corrosion protection
  • Automatic endpoint detection (OES) for reproducible results

 

Materials & Applications

Standard materials:

  • AlSiCu, Al, AlSiTi, AlCu
  • Ti, TiN, TiAl
  • Al₂O₃
  • Metal/dielectric stacks (silicon oxide, amorphous silicon)

Special materials:

  • Ta, Ta₂O₅, Nb, Nb₂O₅
  • Including a cleaning regime to comply with contamination limits

 

Applications

  • Conductor tracks (with and without barrier)
  • MEMS structures (wide range of designs and open areas)
  • Thick metal layers up to over 3 µm
© Fraunhofer IPMS
Examples of metal stacks: top: AlSiTi–TiAl metal stack; middle: AlSiCu–TiN metal stack; bottom: AlSiCu–TiN metal stack.

Process competence

  • Anisotropic etching/minimal under-etching
  • Nearly vertical side walls (with appropriate design)
  • Process experience with high open area
  • Contamination limits are adhered to despite process mix and processing of special materials

 

High process reliability

  • Automatic endpoint detection or fixed-time processes
  • Consistent results across different layouts
  • Optimised for small and large open areas

Corrosion protection included:

Immediately after etching, in-situ water vapour plasma passivation and complete paint removal take place. In combination with subsequent EKC wet cleaning, chlorine-induced corrosion and residues are prevented and maximum component reliability is ensured.

 

Our advantages at a glance

  • Wide range of materials can be structured
  • Reproducible results (profiles, over-etching)
  • Process development for demanding geometries/layer stacks
  • Cluster operation without vacuum break, maximum corrosion protection for the structures
  • Safe handling of corrosive chemicals
  • Qualified series processes and customer-specific adaptations
  • Production according to defined contamination classes

Etch

300 mm

© Fraunhofer IPMS
Tokyo Electron and Applied Materials Mainframes at Fraunhofer IPMS

Process

  • Metal etch (Al / Al alloys)
  • Dielectrics & poly etch (SiO2, Si3N4,
  • PolySi, a-Si)
  • Deep silicon etch (aspect ratio up to 30)

 

Etching mechanisms

  • 4 steps: generation, adsorption, reaction, desorption
  • Etching rate, selectivity, anisotropy
  • Reactions:
    • Plasma: CF4 + e- → CF3+ + F* + 2e-
    • Si surface: Si + 4F → SiF4
    • SiO2 surface: SiO2 + 4F → SiF4 + O2

 

Equipment

Tokyo Electron and Applied Materials Mainframes for 12” Wafer (BEOL and FEOL)

  • ICP and CCP reactors with RF pulsing options
  • Gas pulsing and ALE processing
  • High temperature etching (up to 250 °C)
  • Highly flexible process gas selection
  • Optional 8“ wafer processing
  • In-situ plasma analytics (QMS, SEERS, HROES)

Our Equipment:

 

Fraunhofer IPMS

200 mm MEMS Cleanroom Infrastructure

 

Fraunhofer IPMS

300 mm CMOS Cleanroom Infrastructure