A Novel Hybrid High-Speed and Low Power Antiferroelectric HSO Boosted Charge Trap Memory for High-Density Storage
Tarek Ali, Konstantin Mertens et al. (Fraunhofer IPMS - Center Nanoelectronic Technologies)
We report on antiferroelectric (AFE) hybrid charge trap (CT) memory with amplified tunnel oxide field via dynamic AFE hysteresis dipole switching. Memory window (4.5V), switching speed (<1μs), 10 years retention, and 105 endurance are reported. The HSO/HZO with tailored (FE,AFE) hysteresis are explored for low power and high-speed-boosted CT memory.
Energy Harvesting in the Back-End of Line with CMOS Compatible Ferroelectric Hafnium Oxide
Clemens Mart, Sukhrob Abdulazhanov, Malte Czernohorsky et al. (Fraunhofer IPMS - Center Nanoelectronic Technologies)
We demonstrate the feasibility of thermal energy recovery in the back end of line employing CMOS-compatible ferroelectric hafnium oxide. Our energy harvesting approach exceeds the efficiency limit of commonly-used thermoelectric materials, without using a heat switch. The abundance in CMOS manufacturing make HfO2-based ferroelectrics promising candidates for integrated energy harvesting.
Ultra Low Power Flexible Precision FeFET based Analog In-memory Computing
Taha Soliman, Franz Müller et al. (Fraunhofer IPMS)
This paper presents an efficient crossbar design and implementation intended for analog compute-in-memory (ACiM) acceleration of artificial neural networks based on FeFET technology. The mixed signal blocks reduce the device-to-device variation and offer low area, low power and high throughput. The ACiM achieves a record peak performance of 13714 TOPS/W.
A Scalable Design of Multi-Bit Ferroelectric Content Addressable Memory for Data-Centric Computing,
Chao Li, Franz Müller, Tarek Ali et al. (Fraunhofer IPMS - Center Nanoelectronic Technologies)
We propose a novel scalable and ultra-compact multi-bit CAM design based on 2FeFET1T structure. Successful functionality verification of a CAM cell and array on 2-bit FeFET and statistical verification of sufficient sensing margin for an 1x32 CAM array are demonstrated. Density and performance are greatly improved compared with SRAM CAM.