ICICDT 2021#

International Conference on IC Design and Technology
September 15 - 17, 2021
Digital conference organized by Fraunhofer IPMS in Dresden, Germany.

International Conference on IC Design and Technology 2021

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ICICDT 2021 News#

Program Updates

  • Tutorials online 
  • Invited talks and keynote speaker updates
  • Social program announced
  • See "ICICDT 2021 Prorgram" tab for more

Welcome#

© Dresden Mediaserver
Dresden with view towards the old town.

ICICDT 2021 will take place from September 15  to September 17, 2021 in a virtual format. It will be organized by Fraunhofer IPMS in Dresden, Germany.

The International Conference on IC Design and Technology (ICICDT) is the global forum for interaction and collaboration of IC design and technology for "accelerating product time-to-market". Close collaboration of the multi-discipline technical fields design / device / process accelerates the implementation of new designs and new technologies into manufacturing.

IC industry trends toward specializing system design and manufacturing outsourcing, such as fabless design house, wafer foundry, design automation tool/software house, and semiconductor processing tool supplier, created the needs for individuals with multi-discipline technical skills for collaborations. Furthermore, advanced IC technology no longer can offer the same level of control over many parameters that have direct adverse impact on circuit behavior. New IC designs also push the limit of technology, and in some cases require specific fine-tuning of certain process modules in manufacturing. Thus the traditionally separated communities of design and technology, design/device/process, are increasingly intertwined.

Issues that require close interaction and collaboration for trade-off and optimization by all design/device/process fields are addressed in this conference. They are:

  • Design/device/process optimizations and trade-off for leakage current, power consumption, and noise issues in mixed-signals, large scale IC devices, or design re-use.
  • Incorporation of new materials (i.e. dual gate, multi-material active layers, etc.) in IC cell library and design of advanced transistor structures (i.e. Double Gate FDSOI, FinFET, etc.).
  • Implementation of IC design and manufacturing process of new device structures (i.e. PDSOI, FDSOI, MRAM, etc.).
  • Reduction of process and plasma induced damage or reduction of device/process parameter fluctuation through the optimization of circuit design and layout, device structure, manufacturing process, and semiconductor processing tool.

As IC design and process technology continue to advance for increased performance, lower power, and accelerated time-to-market, the engineering activities, traditionally separated along the boundary of design and process technology, will have difficulties in meeting the shrinking window of product optimization tasks. ICICDT provides a forum for engineers, researchers, scientists, professors and students to cross this boundary through interactions of design and process technology on product development and manufacturing. The unique workshop style of the conference provides an opportunity to technologists and product designers to exchange breakthrough ideas and collaborate effectively. Two days of technical presentations and workshops will be preceded by a one-day tutorial program of value to both the expert and the beginner.

 

We are excited to see what the unique format looks like as a virtual event. We will keep the tradition that each paper has a short prerecorded presentation available on demand and there will be new ways for posters and Q&A. Be curious!

2021 ICICDT Executive Committee Members#

Advisory Committee: Prof. Stefano D’Amico
Conference Chair: Bich-Yen Nguyen
Conference Co-Chair: Dr. Wenke Weinreich
Technical Program Chair: Prof. Hubert Lakner
Executive Chair: Bich-Yen Nguyen & Thuy Dao
Keynote Chair: Prof. Yuichiro Mitani
Local Arrangement Chair: Dr. Wenke Weinreich
Tutorial Chair: Prof. Harald Schenk & Prof. Koji Eriguchi
Exhibition Chair: Tina Hoffmann
Publicity & Award Chair: Dr. Kin P. Cheung
Publication Chair: Prof. Chun Zhao
Treasurer: Dr. Dina Triyoso
Secretary: Prof. Wen Liu

It is with great sadness that we convey to you the news that Prof. Cezhou Zhao, Professor in the Department of Electrical and Electronic Engineering of School of Advanced Technology, Xi'an Jiaotong-Liverpool University, and co-chair of ICICDT 2021, has passed away unexpectedly. Prof. Zhao was an inspiring leader and a strong voice within the School and much loved and respected by colleagues and students in the University. We at ICICDT are with his family and friends in our thoughts.

2021 ICICDT Sub-Committee Chairs#

Topic Chairs
Advanced transistor / Memory Devices / Advanced materials and technologies Gong Xiao, Cuiqin Xu, Akif Sultan, Dina Triyoso, Ran Cheng
EDA & design optimization, DFM/DFT/DFR/DFY Rouwaida Kanj, Yan Wang, Thomas Kämpfe
Advanced packaging, 2.5D/3D integration Thuy Dao, Bich-Yen Nguyen, David Pan, Xin Lin, Thomas Werner, Guillaume Besnard
System-on-Chip (SoC) / Internet of Things /AI Xuan-Tu Tran, Philippe Flattresse, Wenke Weinreich
Reliability Kin Cheung, Yuichiro Mitani, Koji Eriguchi, Chun Zhao
RF/analog and mixed signal/ IO and ESD Protection / Low Power Philippe Galy, Stefano D'Amico, Nima Shahpari

Past ICICDT Conferences#

To give you an idea of speakers and papers that have appeared at previous ICICDT conferences, please look into the program schedules from past ICICDT Conferences:

  • 2019: Suzhou, China — Program
  • 2018: Otranto, Italy — Program
  • 2017: Austin, Texas, USA — Program
  • 2016: Ho Chi Minh City, Vietnam — Program
  • 2015: Leuven, Belgium — Program
  • 2014: Austin, Texas, USA — Program
  • 2013: Pavia, Italy — Program
  • 2012: Austin, Texas, USA — Program
  • 2011: Kaohsiung, Taiwan — Program
  • 2010: Grenoble, France — Program
  • 2009: Austin, Texas, USA — Program
  • 2008: Grenoble, France — Program

Contact Information#

For information about paper submission and registration, please contact the conference office:

Ajda Omrani - mcc Agentur für Kommunikation

 

For technical information about the conference, please contact the local chair.

Dr. Wenke Weinreich - Fraunhofer IPMS (Center Nanoelectronic Technologies CNT)

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About the Organizers#

© Fraunhofer IPMS
Fraunhofer IPMS headquarters in the north of Dresden.
The business area Center Nanoelectronic Technologies (CNT) in the vicinity of the headquarter.
The 300 mm cleanroom at Fraunhofer IPMS-CNT.

Fraunhofer IPMS

The Fraunhofer Institute for Photonic Microsystems IPMS in Dresden is one of 74 institutes in Germany with a modern R&D infrastructure in the field of optical sensors and actuators, integrated circuits, microsystems (MEMS/MOEMS) and nanoelectronics. Fraunhofer IPMS is a worldwide leader in research and development services for electronic and photonic microsystems in the fields of Smart Industrial Solutions, Medical & Health applications and Improved Quality of Life. Innovative products can be found in all large markets – such as ICT, consumer products, automobile technology, semiconductor technology, measurement and medical technology – products which are based upon various technology developed at Fraunhofer IPMS.

Dresden

We would have loved to welcome you in Dresden, the capital city of the German state of Saxony. Dresden has a long history as the capital and royal residence for the Electors and Kings of Saxony, who for centuries furnished the city with cultural and artistic splendor. The city was known as the Jewel Box, because of its baroque and rococo city centre. Today, Dresden is a cultural, educational and political centre of Germany and Europe. The Dresden University of Technology is one of the 10 largest universities in Germany. The economy of Dresden and its agglomeration is one of the most dynamic in Germany and ranks first in Saxony. It is dominated by high-tech branches, often called “Silicon Saxony”. Dresden is one of the most visited cities in Germany with 4.7 million overnight stays per year. 

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Dates and Deadlines#

The conference ID is 51558X.

 

Deadline for online paper submission May 28, 2021
Deadline for notification to authors June 21, 2021
Deadline for final paper and copyright form submission July 15, 2021
Deadline for early bird registration
July 26, 2021
Deadline for uploading the pre-recorded presentation August 25, 2021


ICICDT 2021 Presentation Templates

Please download and use the templates in the blue boxes. The first template is four your presentation and the summary slide template will be the base for the Q&A. Thank you!  

 

Final Paper Submission#

ICICDT 2021 allows only online submission of the papers in PDF format. Please strictly follow the guidelines in Author Information while preparing the paper.

It is MANDATORY to verify the PDF file of the paper for IEEE compliance before submission using PDF Express (The conference ID is 51558X.). Papers that are not IEEE compliant will not be included in the proceedings nor published on IEEE Xplore.

When checked with PDF Express the paper is NOT submitted yet. After receiving confirmation of compliance from PDF Express authors must submit the PDF file approved by PDF Express through the online submission system.

Please double check the informations that you provide during online submission:

  • title of the paper,
  • name, affiliation, e-mail address of the authors,
  • name of the corresponding author,
  • complete mailing address, phone, fax, and e-mail address of the corresponding author.

Since these informations will be used unchanged in the conference program and proceedings, it is important that you enter them correctly. Please rember to submit online also the IEEE Copyright Form after submitting the final paper.

Speaker Information#

Invited Speaker#

In order to upload your contribution, you would first need to create a user account on ConfTool, our conference management system: https://www.conftool.net/icicdt2021/. After you have done this, we will assign you the status of invited speaker. Once the status is assigned, you will be informed accordingly and you can start uploading your paper. You can submit your contribution by clicking "Your Submissions" on the main page after logging in and then selecting the "Invited Papers" option. Please ignore the "Deadline has passed" information, as an invited speaker this does not apply to you.

When creating your paper, make sure that the following criteria are met:

  • Contributions submitted for ICICDT 2021 must be a minimum of two pages and a maximum of four pages, all illustrations and references included.
  • The IEEE template is available for download here. Please format your paper according to the manuscript specifications.
  • The placeholder for the copyright information at the bottom of the first page must be replaced by the following information: 978-1-6654-4998-4/21/$31.00 ©2021 IEEE.
  • Before you upload the final version, the PDF file must pass the IEEE PDF checker. The conference ID is 51558X.
  • Please enter a short CV of the presenting author during the upload process.
  • When uploading the final camera-ready manuscript, you must indicate whether your paper is a student contribution and grant IEEE Xplore copyright directly via ConfTool.

Please submit your final paper of 2-4 pages on ConfTool by July 15, 2021!
 
Due to the ongoing COVID-19 pandemic, the ICICDT 2021 will be held online. The conference will be an on-demand virtual event of pre-recorded presentations combined with a live event from September 15-17, 2021. We are currently finalizing our agenda and details on the format of the event. Initial information about the program can be found under "Program". Look forward to exciting tutorials, live keynotes and Q&A workshops from September 15 to 17! You can also expect social activities and networking opportunities.

Conference fee
At least one author per paper must be registered for the conference. The early bird price of 255 euros is available until July 15. IEEE members and students are eligible for a discount. For information on ticket prices please click on the registration tab.  Please register for the conference via ConfTool no later than July 15.

Pre-recorded video presentation and summary slide
We kindly ask you to submit a 15-minute video presentation of your work. Taking the participants through your slides in a recorded presentation will allow you to explain your work in greater detail and make it a more personal and engaging experience for the attendees. From the beginning of August you will have access to the event platform where the online conference will take place. There you can then upload your video by yourself. As the presentations are on-demand, not live, you can review and re-record your presentation until you are satisfied with the quality. In addition to the video, please create one summary slide to be used as the basis for the live Q&A workshop sessions. The video presentation and summary templates will be posted online on here soon.

Please prepare and submit your video presentation and summary slide no later than August 25, 2021. This way the videos will be available on-demand to all conference participants one week before the virtual live event.

The conference ID is 51558X.

Regular Speaker#

Final papers submitted for ICICDT 2021 must be a minimum of two pages and a maximum of four pages, all illustrations and references included. The IEEE template is available for download here. Please format your paper according to the manuscript specifications. The placeholder for the copyright information at the bottom of the first page must be replaced by the following information: 978-1-6654-4998-4/21/$31.00 ©2021 IEEE.


Before you upload the final version, the PDF file must pass the IEEE PDF checker. When uploading the final camera-ready manuscript, you must indicate whether your paper is a student contribution and grant IEEE Xplore copyright directly via ConfTool.

Final paper requirements can also be found herePlease submit your final paper of 2-4 pages on ConfTool by July 15, 2021!
 
Due to the ongoing COVID-19 pandemic, the ICICDT 2021 will be held online. The conference will be an on-demand virtual event of pre-recorded presentations combined with a live event from September 15-17, 2021. We are currently finalizing our agenda and details on the format of the event. Initial information about the program can be found here. Look forward to exciting tutorials, live keynotes and Q&A workshops from September 15 to 17! You can also expect social activities and networking opportunities.

Conference fee
At least one author per paper must be registered for the conference. The early bird price of 255 euros is available until July 15. IEEE members and students are eligible for a discount. Information on ticket prices can be found herePlease register for the conference via ConfTool no later than July 15.

Pre-recorded video presentation and summary slide
We kindly ask you to submit a 10-minute video presentation of your work. Taking the participants through your slides in a recorded presentation will allow you to explain your work in greater detail and make it a more personal and engaging experience for the attendees. From the beginning of August you will have access to the event platform where the online conference will take place. There you can then upload your video by yourself. As the presentations are on-demand, not live, you can review and re-record your presentation until you are satisfied with the quality. In addition to the video, please create one summary slide to be used as the basis for the live Q&A workshop sessions. The video presentation and summary templates will be posted online here soon.

Please prepare and submit your video presentation and summary slide no later than August 25, 2021. This way the videos will be available on-demand to all conference participants one week before the virtual live event.

The conference ID is 51558X.

Recording Information#

Presentations for ICICDT will be available prerecorded in the conference platform. You will need to upload a video file with your slides and embedded audio commentary to the event platform. Your talk will be most successful if you not only read the contents of the slides, but give well-narrated, graphically rich presentations.

Our suggested presentation video duration is:

  • 10 min for contributed
  • 15 min for invited

Create your video

To record your audio, most integrated microphones of notebooks or tablets will be sufficient as long as your recorded speech is clear and easily comprehensible. 

For recording, follow the instructions in our platform help center which you will get access to soon.

Review your video

  • Is your file an .mp4, .mpg, .avi, .mov, or .wmv?
  • Is your audio at the right level, clear, consistent and free from any noises? 
  • Does your talk start and end without unnecessary breaks before and after?
  • Is there an audio commentary on each slide? Otherwise the correct display duration is not recorded.
  • Is everything displayed correctly?

Prepare for questions

While your presentation will be available on demand, there will be a chance for questions and answers in a live session. Please use the Q&A slide template for a summary of your presentation and paper. Please note that the summary should be only one slide. Updated information on the session schedule will be available here in the program section.

Submit your video and summary slide

Presentations for contributed and invited papers can be uploaded to the conference platform in August. Your summary slide can be uploaded there too. Please use .pptx or .ppt file format and, for technical safety, upload the same slide as .pdf. You will receive information on access and a link.

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Program and Tutorials#

  • September 15: Tutorials
  • September 16 & 17: Live workshops, keynotes & talks, Q&As, networking & social program
We are excited to see what the unique format looks like as a virtual event. We will keep the tradition that each paper has a short prerecorded presentation available on demand and there will be new ways to network with each other and get in touch with the speakers during the Q&A. Be curious!

ICICDT 2021 Tutorials - Wednesday, September 15th, 2021#

Tutorials are about 1.5 hours long with additional discussion time. Tutorials will take place on Wednesday, September 15, 2021 and can be booked optionally in addition to the conference. Please click the registration tab for more info. 

 

TUTORIAL  Speaker SESSION CHAIR TIME (CET) TIME (PST) tiME (JST)
#1 Plasma-induced damage (Process and device design) Andreas Martin (Infineon Technologies AG, Germany) Prof. Koji Eriguchi 1.00 pm 4.00 am 8.00 pm
#2 GaN power devices: from technology to reliability challenges Dr. Matteo Meneghini (University of Padova, Italy) Prof. Koji Eriguchi 2:30 pm 5:30 am 9:30 pm
#3 Neuromorphic Computing for Edge AI Dr. Thomas Kämpfe (Fraunhofer IPMS, Germany) Dr. Wenke Weinreich 4:15 pm 7:15 am 11:15 pm
#4 Large-Scale Silicon Photonic MEMS Switches Prof. Ming Wu (Berkeley University, USA) Dr. Wenke Weinreich & Prof. Harald Schenk 5:45 pm 8:45 am 0:45 am

 

The tutorials each consist of a 60 min lecture and 30 min Q&A.

For more information about the tutorials please scroll down!

Tutorial #1#

Andreas Martin (Infineon Technologies AG, Neubiberg, Germany)

Andreas Martin (Infineon AG, Germany)

An underestimated design related product reliability risk from plasma processing induced charging damage - PID

Plasma processing induced charging damage (PID) is a serious reliability risk for designs of integrated circuits of various processing nodes and several device types. Dependent on the type/style of design the sensitivity to PID can vary significantly. The most prominent degradation is reported for MOS transistors, but also integrated capacitors can suffer degradation or even dielectrics between metal lines in the metal stack. Any type of technology can be affected implemented on bulk-silicon or on SOI with dielectrics such as SiO2 as well as high-K materials. The reliability risk for a productive circuit is supposedly eliminated by so-called antenna design rules. The maximum metal area causing the charging event is limited in the design manual. However the antenna design rules are only sufficient when the PID reliability stress characterization throughout the process qualification has a high grade and is complete. The incorporation of all possible degradation modes for the PID failure mechanism is essential but not necessarily accomplished. The open question is: “Are all PID risks covered by the rules in the design manual?”

In this tutorial the PID-basics such as antenna ratio, electron shading effect etc. are described briefly and furthermore pitfalls and new findings are highlighted, which could cause significant product risks depending on the layout style. An important topic are the protective devices against PID, their effectiveness is discussed. Aspects associated with 3D-systems are illustrated with respect to PID. Also the limitations of design rule checkers and circuit routing tools are described. The tutorial will give the “beginner” an introduction to the PID-topic while the advanced scientists gets a further perspective into the more or less hidden problem areas.

Tutorial #2#

Dr. Matteo Meneghini (University of Padova, Italy)

Dr. Matteo Meneghini (University of Padova, Italy)

GaN Power Devices: From Technology to Reliability Challenges

GaN power devices have excellent properties for application in the power conversion field. The wide bandgap, the high sheet channel density, the large breakdown field permit to substantially increase performance and reduce losses, compared to conventional silicon devices. Different device structures are available, from lateral normally-off transistors, to fully vertical device architectures. This tutorial reviews the main properties of gallium nitride, and the unique characteristics of GaN-based devices. Details on lateral and vertical device architectures will be given, to present a comprehensive overview on the topic.

In the second part of the presentation, the main reliability challenges for GaN devices will be discussed, with focus on dynamic on-resistance and breakdown phenomena. Finally, perspectives in the GaN field will be presented.

Tutorial #3#

Dr. Thomas Kämpfe (Fraunhofer IPMS, Germany)

Dr. Thomas Kämpfe (Fraunhofer IPMS, Germany)

Neuromorphic Computing for Edge AI

Neuromorphic Computing Technology is a brain-inspired sensing and processing hardware for more efficient and adaptive computing. It promises energy-efficient implementation of human cognition, such as interpretation and autonomous adaptation. Although the communication pathways in the brain and other neural systems cannot be directly translated into electronic circuits, these mathematical models provide the basis for the implementation. Various hardware realizations are currently discussed such as:  mixed-signal analog/digital CMOS circuits, asynchronous event-based communication and processing schemes as well as memristive, phase-change, ferroelectric or spintronic devices, and other nano-technologies. In this tutorial we will introduce these realizations and discuss merits and challenges to reach the goal for efficient neuromorphic computing hardware for edge intelligence systems.

Tutorial #4#

Prof. Ming Wu (Berkeley University, USA)

Prof. Ming Wu (Berkeley University, USA)

Large-Scale Silicon Photonic MEMS Switches 

Silicon photonics has emerged as a promising solution to address the interconnect bottleneck in high performance computing systems and data centers. Silicon photonics provides unprecedented I/O bandwidth, enabling ultrahigh aggregated bandwidth (~ 10 Tbps), high bandwidth density (~ Tbps/mm), and high energy efficiency (~ pJ/bit). In addition, silicon photonics also enable optical switching with large port count and short switching time.

This talk will provide an overview of the state of the art of silicon photonic switches, with emphasis on new micro-electro-mechanical-system (MEMS)-actuated switching mechanism. Large scale (240x240) switches have been demonstrated, as well as wavelength-selective switches with 8x8 ports and 8 wavelengths.

Future scaling to even larger port count will be discussed.

Program - Thursday, September 16th, 2021#

Keynotes: 30 min live presentation and 15 min Q&A | Sessions: 60 min live summary slide presentation (2 min each) and Q&A

  • Pacific Standard Time (PST): -9 hrs.
  • Japan Standard Time (JST): +7 hrs.

time (CET) Speaker title K/I/ID
1:00 pm   Welcome  
1:25 pm Dr. Abu Sebastian
IBM Research (Zurich, Switzerland)
"In-memory computing: The next frontier in deep learning acceleration?" Keynote
2:10 pm Dr. Chidi Chidambaram
Qualcomm (Albany, New York, US)
"Semiconductor challenges in realizing the full benefit of  5G mm wave and extending the roadmap into 6G" Keynote
2:55 pm   Networking Break  
3:10 pm Session 1 "Advanced transistor/Memory devices/material technologies" part 1    
  Xiao Gong
National University of Singapore (Singapore)
"Oxide semiconductor-based transistors for 3D monolithic integration" Invited
  Prof. Zhigang Ji 
Shanghai Jiaotong University (China)
"Design and Implementation of the low power random number generator using nano-scaled transistors" Invited
  Prof. Chun Zhao
Xi'an Jiaotong Liverpool University (China)
"Advanced synaptic transistor device towards AI application in hardware perspective" Invited
  Prof. Suting Han
Shenzhen University (China)
"Function memristor for in-sensor computing" Invited
  Prof. Hongxia Liu
Xidian University (China)
"Research on transparent resistive random memory based on lanthanum-based high-k medium" Invited
  Hongming Ma "Si MPS with CIBH  Structure for Fast Recovery Applications" ID 106
  Dr. Chun Zhao "Resistive Switching Performance of Memristor with Solution-processed Stacked MO/2D-Materials Switching Layers" ID 116
  Yuhao Zhu "Monolithic DFF-NAND and DFF-NOR Logic Circuits Based on GaN MIS-HEMT" ID 120
  Hui-Ching Liu "IMU-Based Real-Time Jump Height Estimation with DSP and Chip Implementation" ID 104
4:10 pm Session 6 "RF/analog MixedSignal", Session 1 "Advanced transistor/Memory devices/material technologies" part 2    
  Prof. Hao Gao
Eindhoven University of Technology (Netherlands)
"Silicon-based sub-THz PA for wireless communication” Invited
  Prof. Mai-Khanh Nguyen 
University of Tokyo (Japan) 
"5G mmWave" Invited
  Prof. Gui Liu "A 77GHz CMOS Down-conversion Mixer with High CG Using CCPT-SPT Structure" ID 109
  Shenjian Zhang "A Multi-Layered Air-Gap Transmission Line Design for CMOS-Compatible Millimeter-Wave Integrated Circuits" ID 117
  Dr. Sabine Kolodinski
Globalfoundries (Dresden, Germany) 
"IC Design & Technology Co-Development: e-NVM & mmWave enablement of 22FDX" Invited
  Prof. Aimin Song
University of Manchester (UK)
"Thin-film transistors that are immune to short-channel effect for low-power circuit applications" Invited
  Dr. Chun Zhao "Water-induced Combustion-  processed Metal-oxide Synaptic Transistor" ID 118
  Dr. Chun Zhao
"Bioinspired Mechano Artificial Synapse Thin-film Transistor" ID 121
5:10 pm   Networking Break  
5:25 pm Session 4 "System on Chip/IOT/AI", Session 7 "Emerging Technologies" part 1    
  Prof. Jane Li
University of Pennsylvania (Philadelphia, US)
"Liquid Silicon: A Nonvolatile Fully Programmable Processing-In-Memory Processor with Monolithically Integrated ReRAM for Big Data/Machine Learning Applications" Invited
  Dr. Thomas Dalgaty
CEA-Leti (Grenbole, France)
"RRAM for stochastic neural network" Invited
  Chin-Hao Chang "A 50K Devices/sec Real-Time RTN Analysis System for Technology Benchmarking" ID 107
  Dr. Yaw Obeng "Deterministic Tagging Technology for Device Authentication" ID 114
  Hua Fan "Design of an All-digital Time Domain Analog-to-digital Converter Based on Ring Delay Line Technology" ID 131
  Hua Fan "A Realizable Digital Bubble Sorting SAR ADC Calibration Technology" ID 132
  Sachin Yadav
IMEC (Löwen, Belgien)
"CMOS compatible GaN-on-Si HEMT technology for RF applications: analysis of substrate losses and no-linearities" Invited
  Dr. Dragan Dinulovic "Magnetics on Silicon Technology Enabling High Switching Frequency Applications" ID 128
  Gabriele Quarta "Co-Design and Optimization of a 320 GHz On-Chip Antenna for THz Detection in 65nm CMOS Technology" ID 112

Program - Friday, September 17th, 2021#

Keynotes: 30 min live presentation and 15 min Q&A | Sessions: 60 min live summary slide presentation (2 min each) and Q&A

  • Pacific Standard Time (PST): -9 hrs.
  • Japan Standard Time (JST): +7 hrs.

time (CET) Speaker title K/I/ID
1:25 pm Dr. Mirko Sanzaro
Toshiba Europe / Cambridge Research Laboratory (UK)
"A photonic integrated quantum communication system" Keynote
2:10 pm Session 5 "Reliability"    
  Prof. Hussam Amrouch
University of Stuttgart (Germany)  
"Reliability Challenges in Emerging Negative Capacitance Transistors" Invited
  Dr. Jacopo Franco
IMEC (Löwen, Belgien)
"Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies" Invited
  Prof. Xiaodong Huang
Southeast University (China)
"Effects of back interface on performance of dual-gate InGaZnO thin-film transistor with an unisolated top gate structure" Invited
  Prof. Cheng Ran
Zhejiang University (Hangzhou, China)
"A ballistic transport study for advanced transistors in post-More era: parasitic resistance, self-heating, and cryogenic analysis" Invited
  Dr. Ruize Sun

"Dynamic Trapping Related Hysteresis of Effective Output Capacitance in Overvoltage Transients of GaN E-mode Devices" ID 105
  Yuxiao Fang

"An Environmentally Friendly Solution-processed ZrLaO Gate Dielectric for Large-area Applications in the Harsh Radiation Environment" ID 115
  Ye Liang "Threshold Voltage Instability in D-mode AlGaN/GaN MIS-HEMTs with Al2O3 Gate Dielectric" ID 122
3:00 pm   Networking Break  
3:15 pm Session 2 "EDA und design optimization, DFT", Session 7 "Emerging Technologies" part 2    
  Bin Gao
Tsinghua University (Peking, China)
"System and technology co-optimization for RRAM-based computation-in-memory chip" Invited
  Prof Jiang Xu
Hong Kong University of Science and Technology (China)
"Rejuvenate Post-Moore's Law Computing with Photonics-Electronics Hybrid Systems" Invited
  Dr. Zhikai Wang "Large-scale Integrated Circuits Simulation Based on CNT-FET Model" ID 108
  Dr. Conrad Rudolf Guhl "Characterization of Design Process Interactions in Shallow Trench Isolation Chemical Mechanical Planarization for Product Diversification and Design Optimization" ID 110
  Hanying Wen  "Approaches for Optimizing Near Infrared Si Photodetectors Based on Internal Photoemission" ID 113
  Prof. Yung C. Liang
National University of Singapore (Singapore)
"High-sensitivity AlGaN/GaN magnetoresistive sensor device by profiling the AlGaN layer" Invited
  Sunanda Thunder "Ultra Low Power 3D-Embedded Convolutional Neural Network Cube Based on α-IGZO Nanosheet and Bi-Layer Resistive Memory " ID 129
  Arianna Morciano "Signal-to-Noise Ratio in Pulsed Mode SiPM for LiDAR Applications" ID 127
  Antonio  Vincenzo Radogna "A Flexible Data Acquisition System for Aerospace Applications" ID 124
4:15 pm Dr. Alvin Leng Sun Loke
NXP Semiconductors (San Diego, California, US)
"Driving Automotive ICs into Advanced CMOS"

Keynote
5:00 pm   Student Award  
5:10 pm   Networking Break  
5:25 pm Session 1 "Advanced transistor/Memory devices/material technologies" part 3    
  Prof. Ni Kai
Rochester Institute of Technology (New York, US)
"In-memory computing using ferroelectrics" Invited
  Prof. Peide Ye
Purdue University (Indiana, US) 
“Dynamic Studies of Polarization Switch in Ferroelectric HfZrO2" Invited
  Pascal Vivet
CEA-Leti (Grenbole, France) 
"2.5D with active interposer (2.5D/3D)" Invited
  Philippe Flatresse
SOITEC Institut National Polytechnique de Grenoble (France)
"FD-SOI, the opportunity for edge computing applications" Invited
  Dr. Chun Zhao "Solution-processed Synapt i c Transistors Utilizing MXenes as Floating Gate" ID 119
  Dr. Chun Zhao

"All-solid-state Ion Doping Synaptic Transistor for Bionic Neural Computing" ID 123
  Hongming Ma "Design and Optimization of N-type SiC Gate Turn-off Thyristor with High Turn-off Gain and High Breakdown Voltage" ID 125
  Zhuocheng Wang "Reverse Blocking HEMTs with Stepped P-GaN Drain" ID 126
  Rui Shao "Robust Training of Optical Neural Network with Practical Errors using Genetic Algorithm: A Case Study in Silicon-on-Insulator-Based Photonic Integrated Chips" ID 130

Keynote #1#

Dr. Abu Sebastian - IBM Research (Zurich, Switzerland)

Dr. Abu Sebastian - IBM Research (Zurich, Switzerland)

"In-memory computing: The next frontier in deep learning acceleration?"

The rise of AI and in particular deep learning is a key driver for innovations in computing systems. There is a significant effort towards the design of custom ASICs based on reduced precision arithmetic and highly optimized dataflow. However, the need to shuttle millions of synaptic weight values between the memory and processing units, remains unaddressed. In-memory computing (IMC) is an emerging computing paradigm that addresses this challenge of processor-memory dichotomy. Attributes such as synaptic efficacy and plasticity can be implemented in place by exploiting the physical attributes of memory devices such as phase-change memory (PCM). It is shown that, using custom “additive noise training”, software equivalent accuracy deep learning inference is possible. Moreover, using a mixed-precision training approach, iso-accuracy training is also possible. The IMC approach can be easily extended to spiking neural networks and to also implement additional entities such as explicit associative memory in an efficient manner for memory augmented neural networks. I will also present deep learning demonstrations based on a first of its kind IMC compute core based on PCM integrated in 14nm CMOS technology. Finally, I will provide a brief overview of photonic in-memory computing that could facilitate unprecedented latency and compute density.

Keynote #2#

Dr. Chidi Chidambaram - Qualcomm (Albany, New York, US)

Dr. Chidi Chidambaram - Qualcomm (Albany, New York, US)

"Semiconductor challenges in realizing the full benefit of  5G mmWave and extending the roadmap into 6G"

Chidi Chidambaram leads the process technology and foundry engineering team at Qualcomm as Vice President Engineering. Qualcomm is a leader among the fab less industry in bringing leading edge semiconductor technologies to manufacturing - Qualcomm was the first company to ship large volume products in 10 nm technology in 2017. Chidi’s team is also responsible for RF devices based on finlet and SOI transistors. Earlier Chidi developed silicon technology at Texas Instruments and was instrumental in the first embedded SiGe implementation by semiconductor Industry. Chidi is recognized as a IEEE fellow for contribution to strain engineering and Design technology co-optimization (DTCO).  Chidi’s 20+ year semiconductor career has evenly straddled research and development with over 60 each of refereed articles and patents.

Keynote #3#

Dr. Mirko Sanzaro - Toshiba Europe / Cambridge Research Laboratory (UK)

Dr. Mirko Sanzaro - Toshiba Europe / Cambridge Research Laboratory (UK)

"A photonic integrated quantum communication system"

Mirko Sanzaro was born in Avola, Italy, in 1988. He received the M.Sc. degree (summa cum laude) in Electronic Engineering and the Ph.D. degree ( summa cum laude) in Information Technology Engineering from Politecnico di Milano, Milan, Italy, in 2013 and 2017, respectively. He is a currently a Research Scientist at Toshiba Europe Limited. His research interests include the design, development, and characterization of Quantum Key Distribution instrumentation.

Keynote #4#

Dr. Alvin Loke - NXP Semiconductors (San Diego, California, US)

Dr. Alvin Leng Sun Loke - NXP Semiconductors (San Diego, California, US)

"Driving Automotive ICs into Advanced CMOS"

Alvin Loke is a Technical Director at NXP Semiconductors in San Diego, having worked on every CMOS node spanning from 250nm to 2nm at Agilent, AMD, Qualcomm, and TSMC. He received a B.A.Sc. degree (highest honors) in engineering physics from the University of British Columbia, and M.S. and Ph.D. degrees in electrical engineering from Stanford University. He spent several years in CMOS process integration and has since then worked on analog/mixed-signal design focusing on a variety of wireline links, design/model/technology interfacing, and analog design methodologies. Alvin is an active IEEE Solid-State Circuits Society volunteer, having served as Distinguished Lecturer, Webinar Chair, CICC Committee Member, Denver and San Diego Chapter Chair, and Guest Editor for Journal of Solid-State Circuits and Solid-State Circuits Letters. He currently serves as an AdCom Member and Chapters Chair as well as a VLSI Symposia Committee Member. Alvin has presented many invited talks, including short courses at ISSCC, VLSI Symposia, CICC, and BCICTS. He has authored over 60 publications (including the CICC 2018 Best Paper) and 29 US patents.

Social Program#

Be curious about our social program:

  • Networking: Even if we can't meet in person, it's a special concern of ours to get everybody into conversation as known from the past ICICDT events. With our range of networking opportunities everybody can get to know each other and exchange ideas about the latest developments in IC Design and Technology. Take advantage of our lounge room and network easily with other ICICDT attendees.
 
  • Insidertour cleanroom CNT: Be part of a virtual Insidertour through the brandnew clean room of Center Nanoelectronic Technologies CNT which is currently in installation and soon to be ramped up. Learn about the processes and technologies of Fraunhofer IPMS and future developments.
 
  • Dresden city tour: Explore Dresden city during a guided virtual tour with our sympatic Dresden Guide Anett. She will show you all corners, you would have seen in person during a physical event in our beautiful town.

 

  • Photobooth: Also the fun part will not be neglected either. Take a photo of yourself in our virtual photobooth and keep it as a conference souvenir. 

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Registration#

Registration is now open!

Participant Fees for ICICDT 2021

  • Early Bird: 255 EUR (until July 26, 2021)
  • Regular: 355 EUR
  • Student* & IEEE Member: 195 EUR
  • Tutorial: +195 EUR

*Please send proof of enrolment at a university to icicdt2021@mcc-events.de or fax it to +49/30/61 28 86 88, we will then send you a registration code.

The invoice for the conference registration is tax exempt according to § 4 No. 22a of German Value Added Tax Act (UStG).