Fraunhofer Institute for Photonic Microsystems
Fraunhofer Institute for Photonic Microsystems

Environmentally compatible silicon oxide-based slurries for microelectronics manufacturing

In today's standard transistor production, the individual devices are electrically separated from each other by purposefully produced deep trenches of insulating silicon oxide. In order to adjust the dimension of the isolation trenches to nanometer accuracy, a chemical mechanical planarization (CMP) process is required. Today, this step uses a polishing suspension (slurry) based on cerium oxide abrasive particles. Since cerium is a rare earth element whose oxide is suspected of being carcinogenic, tests are underway at Fraunhofer IPMS with more environmentally compatible alternative slurries based on silicon oxide.

Since silicon oxide is removed during the manufacturing process and the topography is adjusted with the help of a polishing stop layer made of silicon nitride, (at least) two parameters are of central importance for evaluating a slurry: the oxide removal should be sufficiently high to enable a high process throughput. A high selectivity of the removal is required to stop the process when the polishing stop layer is reached.

The comparison of the oxide removal of two ceride and one silica slurry can be seen in the following diagram:

It can be seen that the removal rate of the silica slurry is parameter-dependent and similar to one of the ceria slurries, and that the target parameter of the removal rate, to which normalization was performed, is achieved. On the basis of ceria slurry 2, however, it can be seen that ceria slurries can generally deliver even much higher removal rates, so that production processes can potentially run faster with them.

In the area of selectivity, the following picture emerges:

The comparison of the selectivity between oxide and nitride ablation shows sufficiently high values for the silica slurry.

Based on these data from wafers with a homogeneous material layer, a ceria-free slurry has recently been applied at Fraunhofer IPMS on production-like patterned 300 mm wafers. Fraunhofer IPMS has thus taken a major step towards sustainable microelectronics manufacturing.

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