Electrical Sensors

Organic Field-Effect Transistor (OFET) Substrates – Test Chips for Material Characterization

© Fraunhofer IPMS
Diced OFET substrates from Fraunhofer IPMS.
© Fraunhofer IPMS
OFET substrates from Fraunhofer IPMS in a waffle pack.
© Fraunhofer IPMS
OFET measurement setup example.

We offer a wide range of services and chemical sensors for industry and science

  • Standard and customized OFET substrates for your organic materials
  • Measuring adapter and deposition masks/shadow masks
  • Waffle pack and wafer size (diced)
  • Industrial technology supplier
  • OFET RnD Expertise for over 10 years
  • Testing and Application partner

 

For Semiconductors and conductors we offer highly reproducible measurements of:

  • Conductivity
  • Carrier mobility
  • On/Off current ratio
  • Influence of annealing and solvent
  • Determination of contact resistance

 

Example OFET substrate design

  • n-doped and backgated OFET substrates
  • 16 transistors per chip with different channel sizes
  • large channel width (W = 2.5 ... 20 µm, L = 10 mm)
  • High reproducibility
  • Gate oxide starting at 28 nm for low voltage

Applications for organic field effect transistors (OFET)

© Fraunhofer IPMS
Organic field effect transistors (OFET) design principle.

OFETs are used for various applications, including flexible displays, smart sensors, organic photovoltaics and printed electronics.

Silicon-based OFET substrates provide a high-precision patterned foundation for the fabrication of organic field-effect transistors (OFETs) and allow the deposition of organic semiconductor layers that determine the electronic properties of the OFET. The resulting OFETs can be flexibly designed due to the adaptability of the materials as well as source and drain contacts.

Due to their reliability and reproducible preparation, these substrates are used worldwide by all major developers of organic semiconductor materials as part of standardized material monitoring.

The Si bulk acts as gate electrode and controls the current flow between the source and drain gold electrodes. A suitably doped Si-SiO2 interface in CMOS quality guarantees a reproducible gate contact. The gold electrodes with patented adhesive layer suppress the formation of injection barriers between the gold electrodes and the organic in the transistor channel, even for p-type semiconductors, so that reliable ohmic source / drain contacts are formed in the back-gated OFET.

In the standard layout, 60 chips of size 15 × 15 mm² each with a total of 960 individual transistor structures are realized on 200 mm wafers. Each chip contains four groups of four identical transistors with channel lengths of 2.5, 5, 10 and 20 µm. Identical layouts with graduated channel widths as well as the flexible choice of oxide thickness allow adaptation to a wide voltage and conductivity range of the materials under investigation. Customized layouts with modified electrode geometry are possible at any time.

Lateral Organic Field Effect Transistors (LOFET)

LOFET waferstack
© Fraunhofer IPMS
LOFET structure.

Another step to simplify material characterisation is the analysis of basic logic circuits. For this purpose, up to 36 individual transistors are connected to form inverter and ring oscillators. Monitoring the active materials then only requires a frequency measurement of the ring oscillators, which can be automated with little effort. The much more time-consuming measurement and evaluation of the individual transistor characteristics can be omitted. Furthermore, one not only obtains reliable information on the logic capability, but at the same time determines the dynamic properties of the inverters.

The available layout of the logic circuits includes a first block with eleven individual transistors, which enables a complete parameter extraction for the circuit simulation. A second block contains four inverters, which are identically found in the oscillator stages. These separately accessible inverter stages allow a detailed analysis of the transient behaviour in case the amplification of the individual inverter stages is not sufficient for the ring oscillators to start oscillating. The third block contains ring oscillators with seven or fifteen stages. Each ring circuit has a three-stage output amplifier that decouples the oscillation in the ring from the output, as well as allowing direct frequency measurement without external amplification.

The LOFET substrates are also realised in bottom-gate architecture, so that after deposition of the semiconductor layer on the chip, functional circuits are available.