CAN IP Core Design

CAN IP Core Design

CAN-bus controller IP-Core for serial communication.

Fraunhofer IPMS offers a CAN IP core design for serial communication in compliance with the CAN2.0B, CAN FD or CAN XL specification for use in FPGA or ASIC. The CAN Core is a bus controller that carries out the serial communication according to the CAN 2.0B and the CAN FD specification (ISO 11898-1: 2015) and CAN XL (CiA 610-1). The core is certified as ASIL-B-ready according to ISO26262 for functional safety in automotive applications. Further ASILs can also be implemented on request. The IP design can be integrated into devices that use CAN or higher-layer CAN-based communication protocols. The CAN core is silicon-proven for ASIC technologies up to 22nm and can also be integrated into FPGA designs.

Key Features

  • Support of CAN and CAN FD (ISO 11898-1: 2015)
  • Support of CAN XL (CiA 610-1 specification)
  • FIFO or priority mode
  • Programmable data and baud rates
  • Programmable interrupts
  • Loopback mode for self-testing
  • ISO-26262 ASIL-B ready (ASIL-C and -D possible on request)